A Process and Technology-Tolerant IDDQ Method for IC Diagnosis

The use of I DDQ test as a defect reliability screen has been widely used to improve device quality. However, the increase in subthreshold leakage currents in deep sub-micron technologies has made it difficult to set an absolute pass/fail threshold. Recent work has focused on strategies that calibrate for process and/or technology-related variation effects. In this paper, a new I DDQ technique is proposed that is based on an extension of a V DDT-based method called Transient Signal Analysis (TSA). The method, called Quiescent Signal Analysis or QSA, uses the I DDQ s measured at multiple supply pins as a means of localizing defects. Increases in I DDQ due to a defect are regionalized by the resistive element of the supply grid. Therefore, each supply pin sources a unique fraction of the total I DDQ drawn by the defect. The method analyzes the regional I DDQ s and " triangulates " the position of the defect to an (x,y) location in the layout. This information can be used in combination with fault dictionary-based techniques as a means of further resolving the defect's location. I DDQ has been used extensively as a reliability screen for shorting defects in digital integrated circuits. Unfortunately , single threshold I DDQ methods applied to devices fabricated in deep sub-micron technologies are resulting in unacceptably high levels of yield loss. The significant increase in subthreshold leakage currents in these technologies is making it difficult to set an absolute pass/fail threshold that fails only defective devices [1]. Several methods have been proposed as solutions to the subthreshold leakage current problem and, more recently, to process variation issues. Current signatures [2], delta-I DDQ [3] and ratio-I DDQ [4] are based on a " self-relative " analysis, in which the " average " I DDQ of each device is factored into the pass/ fail threshold value. In the following discussion, we will refer to the technology dependency of subthreshold leakage current as a technology-related variation effect to contrast it with the chip-to-chip variation effects caused by changes in process parameters (process variation). The approach proposed in this paper is based on a previous V DDT-based method called Transient Signal Analysis (TSA) [5]. TSA uses regression analysis to calibrate for process and technology-related variation effects by cross-correlating multiple supply pin transient signals measured under each test sequence. The I DDQ method proposed in this paper, called Quiescent Signal Analysis or …